Senior Engineer, Layout Design Responsibilities

• Lead end-to-end mask layout design for photonics, optoelectronics, interposer, and power management circuits across block, bar, and die levels. • Own advanced floor planning, placement, routing strategies, and optimization for performance, area, and manufacturability. • Drive layout sign-off activities including DRC/LVS closure, design rule compliance, and full verification readiness. • Collaborate with device engineers, process integrators, and circuit designers to define and refine layout architecture and ensure process compatibility. • Develop, review, and maintain wafer maps, device variant tables, and layout configurations supporting multiple product derivatives. • Lead layout data preparation and release activities including LEF/DEF generation, tape-out package preparation, and documentation control. • Provide technical guidance and mentorship to junior engineers while contributing to design reviews, methodology improvements, and best practices adoption.

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职位要求